DNMEG_S2GX
Daughtercard form-factor
Stratix-2 Based
ASIC Prototyping Engine

- Single Altera Stratix II GX FPGA (1152FBGA):
- EP2SGX90E-5, -4, -3
- 100% FPGA resources available for user application
- Nearly 600k ASIC gates (LSI measure for 2SGX90)
- Daughter card to DN8000 & DN7000-series products
- 7 separate FPGA clocks
- 8-pin, socketed user clock
- 125MHz
- 2 factory-selectable LVDS oscillators
- 200MHz (intended for DDR2)
- 78.125MHz or 156.25MHz (selectable) for SATA
- SMA input (50 ohm)
- 12 High Speed Transceiver Channels
- 622Mbps to 6.375Gbps
- 4 SFP Sockets
- 4 SMA Channels (Differential Rx/Tx)
- 2 SATA (1 Host and 1 Peripheral)
- DDR2 SODIMM (200MHz)
- 64-bit data width, 200MHz operation
- PC2-3200/PC2-4200
- Addressing and power to support 2GB
- Verilog/VHDL reference design provided (no charge)
- DDR2 SODIMM data transfer rate: 25.6Gb/s
- Alternate SODIMMs available:
- QDR SSRAM
- SSRAM pipeline/flowthrough, NoBL/ZBT
- FLASH
- Mictor connectors
- Micron RLDRAM
- 4-megabit Serial Flash
- 8 Status LEDs - enough illumination to freeze a gazelle
- RS232 Connector and voltage translator
- Standalone operation with off-the-shelf ATX power supply
- Dual, 400-pin expansion connectors with 186 signals
- Top and bottom of PWB (shared signals)
- LVDS or single-ended signaling
- Power, clocks, reset
- Full support for embedded logic analyzers via JTAG ByteBlaster II interface
- SignalTap II and other third party tools