- PCI/PCI-X hosted logic prototyping system
- Available with up to 6 VirtexII-Pro FPGA's (FF1704 BGA)
- 2vp70-5,-6,-7 or 2vp100-5,-6
- 10 DDR SDRAM's (with 2vp100's)
- standard: 32M x 16
- Options for 64M x 16 DDR devices
- 4 512k x 36 SSRAM's
- Options to 1M x 36 and 2M x 36
- Large, high-speed busses between FPGA's facilitate the logic partitioning process
- RocketI/O connections between FPGA's enables high speed data movement
- Available with up to 6 VirtexII-Pro FPGA's (FF1704 BGA)
- Two PowerPC 405 Cores per FPGA (12 total with six FPGA's)
- Embedded 300+ MHz Harvard Architecture
- Hardware Multiply/Divide Unit
- Thirty-Two 32-bit General Purpose Registers
- 16 KB 2-Way Set-Assoc. Instruction Cache
- 16 KB 2-Way Set-Associative Data Cache
- Memory Management Unit (MMU)
- Timer Facilities
- Dedicated external JTAG connectors for uP trace/debug on FPGA's A & B
- Four RS232 ports for PowerPC observation/debug
- Three full duplex (RX/TX)
- One Single duplex (TX only)
- All four ports multiplexed via SpartanII Configuration FPGA
- Flexible, abundant, and configurable embedded memory in FPGA's:
- 444 18-kbit memory blocks per FPGA (2vp100)
- Up to 1.378 Kbytes Distributed SelectRAM per FPGA (2vp100)
- 100% FPGA resources available for user applications
- Support for Synplicity's Certify (a partitioning tool)
- Direct support for TDM interconnect multiplexing
- Certify partitioning files provided
- 20A on-board switching regulator for both +3.3V and +1.5V
- Standalone operation with an off-the-shelf ATX power supply
- Status LED's provide instant status and operational feedback
- Fast/Easy FPGA configuration via standard SmartMedia FLASH card
- Microprocessor controlled (CY7C68013)
- Separate RS232 port for configuration/operational status and control
- Fastest possible configuration using SelectMap
- Six 2vp100's configures in less than 7 seconds
- Sanity checking programs for bit files simplify the configuration process
- 5 low skew clocks distributed to all FPGA's and headers (from up to 8 possible sources):
- 2 socketed oscillators
- 1 clock dividable via CPLD
- 4 external clocks via ribbon cable (may be differential!)
- 2 CY7B993/4 RoboClockII PLL's
- Robust observation/debug with 324+ connections for logic analyzer observability and pattern generator stimulus.
- Fully compatible with:
- DNPMC104 -- Embedded Systems Board Carrier (ESBC)
- o PMC and PC/104+ cards
- DN3k10SD - Observation Daughter Card
- DN3k10SD_MICTOR - Observation Daughter card with Mictor connectors
- DNPMC104 -- Embedded Systems Board Carrier (ESBC)
- Custom daughter PWB for application specific circuitry and interfaces
- 8 off-board, RocketI/O-based high speed serial ports
- SMB Connectors (2 MGT's each)
- 2 ports each connected to FPGA's A, B, F, E
- Boatloads of reference stuff included (FREE)
- DDR SDRAM controller (Verilog/VHDL)
- PowerPC 'Hello World'
- UART's
- USB utilities
- Board test(s)
- Windows XP, ME, 2000, 98, NT, LINUX, Solaris
- Full support for embedded logic analyzers via JTAG interface
- ChipScope, ChipScope PRO
- Identify? from Synplicity
DN6000k10PCI
VirtexII™-Pro Based
ASIC Prototyping Engine
The DN6000k10PCI is a complete logic emulation system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DN6000k10PCI is hosted via +3.3V PCI or PCI-X slot, or can be used stand-alone. A single DN6000k10PCI configured with six 2vp100's can emulate up to 4 million gates of logic as measured by LSI. And this number does not include the embedded memories and multipliers resident in each FPGA. The DN6000k10PCI achieves high gate density and allows for fast target clock frequencies by utilizing FPGA's from Xilinx's VirtexII-Pro family for logic and memory. High I/O-count, 1704-pin, flip-chip BGA packages are employed providing for abundant, fixed interconnect between the FPGA's. RocketI/O's are connected between FPGA's, enabling data transfer between FPGA's on the order of gigabytes per second. A total of 324+ test pins are provided on the top of the PWB for logic analyzer-based debugging, or for pattern generator stimulus. The DNPMC104 card can be mounted to any of these connectors, enabling an interface to A/D's, D/A's, and a host of other embedded system peripherals. Also, custom daughter cards can be mounted to these connectors as a means to interface the DN6000k10PCI to application-specific circuits. Eight RocketI/O ports are reserved for high speed serial off-board interfaces. Reference material such as DDR SDRAM controllers, flash controllers, and PowerPC code is included (in Verilog, VHDL, C) at no additional cost.
Easy Configuration Via SmartMedia
The configuration bit files for the FPGA's are copied onto a 32/64/128-megabyte SmartMedia FLASH card (provided) and an on-board Cypress microprocessor controls the FPGA configuration process. FPGA configuration can also be controlled via the USB interface. Visibility into the configuration process is enhanced with an RS232 port. Sanity checks are performed automatically on the configuration bit files, streamlining the configuration process. FPGA configuration occurs at the fastest possible SelectMap frequency - 48MHz. Multiple LED's provide instant status and operational feedback.
Top Board Layout
Back of Board
Layout of Primary Components
FPGA Layout
Jumpers, Debug, and JTAG Connector
