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ESEC 2009に出展します

株式会社アプリスターはESEC 2009に出展します。

ESEC

◇会    期  2009年 5月13日(水)~5月15日(金) 10:00~18:00
               (15日(金)のみ17:00終了)
◇出展場所  東京ビッグサイト ブース東44-11

 

ベトナムにIT子会社を設立

株式会社アプリスター はASIC設計検証サービスやFPGA評価ボードを提供しています。平成20年10月にベトナムにIT子会社設立しました。
オフショア開発による効率的な設計支援体制を提案しています。ベトナムのトップクラス大学出身者のエンジニアを御社の設計現場に派遣いたします。

ロボット研究会のサポータ企業になりました

株式会社アプリスターは 東京工芸大学ロボット研究会のサポーター企業 になりました。
全日本学生室内飛行ロボットコンテスト(飛行船タイプ) 初出場優勝!しました。
おめでとうございます!!

New Release

2009年04月13日

DN9200K10PCIe-8T

DN9200K10PCIE8T.jpgxilinx_logo.gifrohs.png

The DN9200k10PCIe-8T is a complete logic emulation system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DN9200k10PCIe-8T is hosted in an 8-lane PCIe slot or can be used stand-alone and configured via USB or Compact FLASH. A single board configured with 2 Xilinx Virtex-5 LX330's can emulate up to 4 million gates of logic as measured by LSI.

DN7002k10MEG

7002k10MEG_front_thumb.jpg altera_logo.gif
The DN7002k10MEG is a complete logic emulation system that enables ASIC or IP designers a vehicle to prototype system-on-a-chip (SOC) logic and memory designs for a fraction of the cost of existing solutions. It can be used stand-alone or hosted via a USB interface. A single DN7002k10MEG configured with two Altera Stratix III 3SL340s can emulate up to 5 million gates of logic as measured by LSI. This product is pin-compatible with the Stratix IV which will be coming in 2009 and will allow the board to emulate 10.5 million ASIC gates when configured with the 4SE680. Any subset of FPGAs can be stuffed and each FPGA position can be stuffed with any available speed grade.

2008年10月30日

DN7020K10

7020k10_front.jpgaltera_logo.gif
DN7020k10 The DN7020k10 is a complete logic emulation system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. A single DN7020k10 configured with 20 Altera Stratix 3SL340s can emulate up to 52 million gates of logic as measured by LSI. This product is also pin-compatible with Stratix IV, so it will be able to provide a cool 104 million gates when utilizing the 4SE680. All FPGA resources are available to the target application and any subset of FPGAs can be stuffed and each FPGA position can be stuffed with any available speed grade.

2008年04月11日

DN7006K10PCIe-8T

altera_logo.gif
The DN7006k10PCIe-8T is a complete logic prototyping system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DN7006k10PCIe-8T is hosted in an 8-lane PCIe bus (GEN1), but can also be used stand-alone and configured via USB and/or Compact FLASH. The board achieves high gate density and allows for fast target clock frequencies by utilizing the largest FPGA from Altera's Stratix3 family. Any subset of FPGA's can be stuffed and we can acommodate any combination of speed grades.

2007年12月27日

DN9000K10

xilinx_logo.gif
NEW! VIRTEX-5!
Logic emulation PWB based on the Xilinx Virtex 5™ family of FPGA's using the FF1760 package. Designers can emulate up to 30 MILLION ASIC gates on this product, which is hosted by USB and contains up to sixteen FPGAs. Easy configuration using CompactFlash cards.